The present invention relates to a CMOS transmission circuit used to drive a bus line arranged in a MOS-LSI.
A CMOS inverter 1 is used in a conventional CMOS (complementary metal oxide semiconductor) transmission circuit, as shown in FIG. 1. The source of an n-channel enhancement type MOSFET (metal-oxide-semiconductor field-effect transistor to be referred to as a MOS transistor for brevity hereafter) TN is connected to the ground (Vss). The drain of the MOS transistor TN is connected to the drain of a p-channel enhancement type MOS transistor TP. The source of the MOS transistor TP is connected to a power supply terminal 2 (Vcc). The gates of the MOS transistors TP and TN are connected to an input terminal 1a. The common drain node of the MOS transistors TP and TN is connected to a start point of a transmission line 3. The end point of the transmission line 3 is connected to an output terminal 1b. An input signal IN, supplied to the input terminal 1a, is inverted and amplified by the inverter 1, thereby obtaining an output signal OUT at the output terminal 1b. A capacitance C between the transmission line 3 and ground is a parasitic capacitance of the transmission line 3.
In this conventional CMOS transmission circuit having the arrangement described above, when an input signal voltage Vin changes in the range of Vcc to Vss (0 V), the voltage at the transmission line 3 changes by a corresponding magnitude within the range of Vss (0 V) to Vcc, and the parasitic capacitance C is usually very large. Therefore, a great number of carriers must be charged/discharged through the MOSFET TP or TN, and the drive capacity of the CMOS inverter 1 must be preset to be large. For this reason, high-speed signal transmission cannot be performed, and power consumption is increased.